Iterating over lists in Makefiles?

Question

I find I'm writing a lot of Makefiles that could be cleaned up with the use of n-tuple lists. But I can't find any way to do this properly (and cleanly). So far I've only been able to come up with using $(shell ...) and tr, sed, or otherwise non-Makefile standards. For example, I'd like to do this: ``` XYZs = \ dog.c pull_tail bark \ duck.c chase quack \ cow.c tip moo all: @- $(foreach X Y Z,$(XYZs), \ $(CC) $X -o bully/$Y ; \ ln bully/$Y sounds/$Z ; \ ) ``` Is there a good way to iterate n-tuple lists in Makefiles? Thanks!

Accepted Answer

Makefiles are essentially declarative in nature, so I don't think that make itself provides what you want. However, you seem to be wanting to associate some string values with specific targets, so maybe the Target specific variable values feature of GNU make will be of interest. This is an extract from the manual:

There is one more special feature of target-specific variables: when you define a target-specific variable, that variable value is also in effect for all dependencies of this target (unless those dependencies override it with their own target-specific variable value). So, for example, a statement like this:

`prog : CFLAGS = -g`

`prog : prog.o foo.o bar.o`

will set `CFLAGS` to `-g` in the command script for `prog`, but it will also set `CFLAGS` to `-g` in the command scripts that create prog.o, foo.o, and bar.o, and any command scripts which create their dependencies.

If you haven't already read it, the GNU make manual is pretty damn good.

Edit: To do what you asked about in your comment:

```
dog: ANIMAL=dog.c BULLY=pull_tail SOUND=bark
```

use:

```
dog: ANIMAL=dog.c 
dog: BULLY=pull_tail 
dog: SOUND=bark
```

Iterating over lists in Makefiles?

Solution

Problem