Do we need mfence when using xchg
assembly, c, c++, memory-fences, x86
Solution
As said in the other answers the lock prefix is implicit, here, so there is no problem on the assembler level. The problem may lay on the C (or C++) level when you use that as inline assembler. Here you have to ensure that the compiler doesn't reorder instructions with respect to your `xchg`. If you are using gcc (or cousins) you would typically do something like:
__asm__ __volatile__("xchgl %1, %0"
: "=r"(ret)
: "m"(*point), "0"(ret)
: "memory");
that is declare the instruction as volatile and add the "memory" clobber.
Problem
I have a set and test `xchg` based assembly lock. my question is : Do we need to use memory fencing (`mfence`, `sfence` or `lfence` ) when using `xchg` instruction ? Edit : 64 Bit platform : with Intel nehalem