makefile for C++/CUDA project

Question

I've read almost all questions about CUDA, C++ & makefiles here, but still can't figure solution to my problem. I have a some `.cpp` files & some `.cu` files inside `src/` directory of my project (along with `.h` & `.cuh`), and I'd like to build my application with a makefile. I have tried to do it this way: ``` SRC_DIR = src OBJ_DIR = obj CPP_FILES = $(wildcard $(SRC_DIR)/*.cpp) CU_FILES = $(wildcard $(SRC_DIR)/*.cu) H_FILES = $(wildcard $(SRC_DIR)/*.h) CUH_FILES = $(wildcard $(SRC_DIR)/*.cuh) OBJ_FILES = $(addprefix $(OBJ_DIR)/,$(notdir $(CPP_FILES:.cpp=.o))) CUO_FILES = $(addprefix $(OBJ_DIR)/,$(notdir $(CU_FILES:.cu=.cu.o))) $(TARGET) : $(OBJ_FILES) $(CUO_FILES) $(LD) $(LDFLAGS) $(LIB_CUDA) -o $@ $? $(CUO_FILES) : $(CU_FILES) $(CUH_FILES) $(NVCC) $(NVCCFLAGS) $(INCLUDES) -c -o $@ $< $(OBJ_DIR)/%.o : $(SRC_DIR)/%.cpp $(H_FILES) $(NVCC) $(NVCCFLAGS) $(INCLUDES) -c -o $@ $< ``` And it was OK until I've got a second .cu file. And then I tried: ``` <... previous part stays the same ...…

Accepted Answer

Either you have a syntax error in your Makefile somewhere you are not showing, or the layout of your project isn't as you have described. If I take this model of your Makefile:

```
TARGET    = nothing
SRC_DIR   = src
OBJ_DIR   = obj

CPP_FILES = $(wildcard $(SRC_DIR)/*.cpp)
CU_FILES  = $(wildcard $(SRC_DIR)/*.cu)

H_FILES   = $(wildcard $(SRC_DIR)/*.h)
CUH_FILES = $(wildcard $(SRC_DIR)/*.cuh)

OBJ_FILES = $(addprefix $(OBJ_DIR)/,$(notdir $(CPP_FILES:.cpp=.o)))
CUO_FILES = $(addprefix $(OBJ_DIR)/,$(notdir $(CU_FILES:.cu=.

OBJS =  $(patsubst %.cpp,$(OBJ_DIR)/%.o,$(notdir $(CPP_FILES)))
OBJS += $(patsubst %.cu,$(OBJ_DIR)/%.cu.o,$(notdir $(CU_FILES)))

$(TARGET) : $(OBJS)
    echo "linking rule : " -o $@ $?

$(OBJ_DIR)/%.cu.o : $(SRC_DIR)/%.cu $(CUH_FILES)
    echo ".cu.o rule : " $@ $<
    touch $@

$(OBJ_DIR)/%.o : $(SRC_DIR)/%.cpp $(H_FILES)
    echo ".o rule : " $@ $<
    touch $@
```

and then I make a model of what you have described:

```
$ mkdir src
$ mkdir obj
$ touch  src/main.cpp
$ touch  src/cuda-utils.cuh
$ touch  src/thrust.cu
$ touch  src/cuda-utils.cu
$ touch  src/util.cpp
$ touch  src/main.cpp

$ ls
Makefile    obj     src

$ ls src
cuda-utils.cu   cuda-utils.cuh  main.cpp    thrust.cu   util.cpp

$ ls obj
```

and then I run make:

```
$ make
echo ".o rule : " obj/main.o src/main.cpp
.o rule :  obj/main.o src/main.cpp
touch obj/main.o
echo ".o rule : " obj/util.o src/util.cpp
.o rule :  obj/util.o src/util.cpp
touch obj/util.o
echo ".cu.o rule : " obj/cuda-utils.cu.o src/cuda-utils.cu
.cu.o rule :  obj/cuda-utils.cu.o src/cuda-utils.cu
touch obj/cuda-utils.cu.o
echo ".cu.o rule : " obj/thrust.cu.o src/thrust.cu
.cu.o rule :  obj/thrust.cu.o src/thrust.cu
touch obj/thrust.cu.o
echo "linking rule : " -o nothing obj/main.o obj/util.o obj/cuda-utils.cu.o obj/thrust.cu.o
linking rule :  -o nothing obj/main.o obj/util.o obj/cuda-utils.cu.o obj/thrust.cu.o

$ ls obj
cuda-utils.cu.o main.o      thrust.cu.o util.o
```

I get exactly what is expected. So if you are having a problem, it is not coming from what you have posted in your question (after the several "typos" in the original version were fixed).

makefile for C++/CUDA project

Solution

Problem