Make, inherit rules in subdirectory Makefile

I want to set up a system of Makefiles in my project directories so that the rules defined in one will be defined in others. Let's say for example I have a directory called "test" and inside is "test.c" but I want to build test.c using a rule defined in a Makefile in the root directory Here is an example ``` #Makefile (inside base dir) %.o: %.c gcc -Wall -c $^ all: make -C test out.a #test/Makefile out.a: test.o ar rcs $@ $^ #test/test.c int main() { return 0; } #inside root dir $make make -C test make[1]: Entering directory `test' cc -c -o test.o test.c /usr/ucb/cc: language optional software package not installed make[1]: *** [test.o] Error 1 make[1]: Leaving directory `test' make: *** [all] Error 2 ``` Notice how it invokes cc instead of my rule using gcc defined in the root makefile. In summary, I don't want to have to define the same rule in each Makefile