Overflow and Carry flags

8-bit, addition, overflow

Solution

Per your comments, your question seems to be "is it possible to have both carry and overflow set for a two's complement add involving signed number?" It is. The typical implementation is to take the exclusive-OR of the carry-in for the last adder with the carry-out at the end of the chain -- hence, an overflowing addition of negative numbers will cause the carry-out bit to be set and the overflow bit to be set.

Here's an example, add -1 to -128:

Carry 10000 0000 
       1000 0000  (-128)
       1111 1111  (-1)
       ---------
       0111 1111 (oops, this is 127!)

Carry will be set, since the last add resulted in a carry -- and overflow will be set based on the rule above (also, note that -128 added to -1 is obviously not 127)

Problem

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