Using VHDL generic values in other generics

vhdl

Solution

In VHDL-2002 (and earlier), a formal generic declared within a given generic list can't be used to declared other generics in that list, which is the reason for the error you see.

In VHDL-2008 that is possible, so if the required tools support VHDL-2008 and that feature ("Referencing generics in generic lists"), then you can indicate to the tools that VHDL-2008 is used.

A solution for VHDL-2002, is to make the `ch_low` and `ch_hi` arrays large enough to accommodate any value of `num_chan`, and then fill the unused with a dummy value, like (assuming `num_chan` is at most 10, using -1 as dummy value):

generic(
  num_chan : integer            := 2;
  ch_low   : int_arr_t(1 to 10) := (  1, 189, others => -1);
  ch_hi    : int_arr_t(1 to 10) := (127, 189, others => -1));

Problem

I want to be able to specify a number of channels as a generic and use this to specify the range of an array containing further parameters. When compiling, my Aldec compile tell me that 'num_chan' cannot be referenced until the interface list is complete. Does anyone know a way to achieve this? ``` ENTITY deframer IS generic ( num_chan : integer := 2; ch_low : int_arr(num_chan-1 downto 0) := ( 1, 189); ch_hi : int_arr(num_chan-1 downto 0) := (127, 189)); ```

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