Using GNU-make functions to check if variables are defined
gnu-make, makefile
Solution
The `$(call ...)` function does not evaluate the results of the function as if it were makefile code, so you can't things like `ifdef` there.
What happens is that the contents of `check-var-defined` are expanded and since it doesn't recognize the `ifdef` operation, it just proceeds to expand the `$(error ...)` function every time.
If you want to use `ifdef` you have to use `$(eval ...)` with `$(call ...)` which will evaluate the result as if it were a makefile.
Simpler is to use the `$(if ...)` function, like this:
check-var-defined = $(if $(1),,$(error $(1) is not defined))
Note that this will fail if the variable is empty, which is not quite the same thing as being undefined; it could have been defined to be empty (as `VAR1=`). But that's the way `ifdef` works, too, confusingly.
Problem
I'm writing a makefile that requires some enviroment variables to be defined. I am trying to use something like this to acheive this: ``` define check-var-defined ifndef $(1) $(error $(1) is not defined) endif endef $(call check-var-defined,VAR1) $(call check-var-defined,VAR2) $(call check-var-defined,VAR3) rule1: #stuff ``` When I run make with no args I get this: ``` $ make Makefile:7: *** VAR1 is not defined. Stop. ``` But when I run it with VAR1 specified I get the same error. ``` $ make VAR1=hello Makefile:7: *** VAR1 is not defined. Stop. ``` Any ideas why this doesn't work? What can I do to make this work? Thanks in advance. (Note that I need to check that the variables are actually defined when the makefile is run, as I need to include another makefle further down and the variables need to be set correctly by the time I do this).