Bank conflicts with respect to word size

cuda

Solution

With a GPU of compute capability 2.* or 3.*, there are 32 shared memory banks; but you might well have more than 32 words (= 128B) of data in shared memory. Each bank `b` is responsible for all the data in addresses (say) `A % nbanks == b`:

        +--------+---------+---------+-
Bank 0  | word 0 | word 32 | word 64 |...
        +--------+---------+---------+-
Bank 1  | word 1 | word 33 | word 65 |...
        +--------+---------+---------+-
Bank 2  | word 2 | word 34 | word 66 |...
        +--------+---------+---------+-
 ...    |  ..... |         |         |
        +--------+---------+---------+-
Bank 30 | word 30| word 62 | word 94 |...
        +--------+---------+---------+-
Bank 31 | word 31| word 63 | word 95 |...
        +--------+---------+---------+-

If everyone is accessing word 0, there is "broadcast" functionality for that; but if thread 0 is accessing word 0, thread 1 is accessing word 32, etc, then those accesses will be serialized.

Problem

I read out few good articles on shared memory; but I have initial question with respect to bank conflicts It is said that if thread 1 and thread 2 accesses word 0 from bank 0 then there is no bank conflict but if they access different words then there will be bank conflict; but my question is how different words can reside in a single bank? As bank 0 size is 32 bits and word size is 32 bits; there can be utmost 1 word/bank.

Original source